(见于欧洲、亚洲的)蝰蛇,小毒蛇;(见于北美,毒性各异的)猪鼻蛇,乳蛇 In Europe and Asia, an adder is a small poisonous snake that has a black pattern on its back. In North America, a number of different poisonous and non-poisonous snakes are called adders .
The adder is Britain's only venomous snake. 蝰蛇是英国唯一的一种毒蛇。
He is as deaf as a post [ stone, door-post, door-nail, an adder]. 他完全聋了。
The delay due to the carry propagation through the adder stages can be minimized when a carry-look-ahead scheme is used. 采用越级进位方式可以减小逐级进位造成的延时。
The BIST of the principle of achieving is introduced first in this paper, then take the8-bit ripple carry adder as an example, describes the design process of BIST. 文中首先介绍了内建自测试的实现原理,在此基础上以八位行波进位加法器为例,详细介绍了组合电路内建自测试的设计过程。
Floating-point adder As she watched him eat, there was an expression of great tenderness in her face. 当她望着他吃东西的时候一种异常温柔的神色浮上了她的脸庞。
The cell circuit design and test of inductive adder pulse generator for kicker magnet are presented in the paper. 文章介绍了用于冲击磁铁的感应叠加型脉冲发生器的实验装置。
In chapter four, according to our polarization encoded logic theory, we designed the MSD adder module. 第四章首先描述了我们提出的偏振编码理论,并利用液晶编码,设计了MSD加法运算模块。
Design of the Floating Point Adder and Research of Its Bist FPU中浮点加法器的设计及其内建自测试的研究
Research on a parallel adder with 4 binary addends and its interface 4个加数的并行加法器及扩展接口的研究
Binary Addition and Subtraction, Implementation and Performance of the Full Adder, High-speed Addition, Signed Arithmetic. 二进制加减,全加器的实现和性能,高速加法,带符号加法。
Design methods of one-bit full adder circuit 一位全加器实验电路设计方法的研究
In the modern computer, the adder being present in the arithmetic logic unit. 在现代的电脑中,加法器存在于算术逻辑单元之中。
A simple adder described previously in other websites have been made, and now exist here. 一个简单的加法器描述,以前在别的网站上被发过,现在存在这里。
Generalized Full Adder in Array Multiplier Design Model Application 一般化全加器在阵列乘法器设计中的典型应用
A Fault-tolerant Adder with Duplicated Code and Hamming Code 一种基于复制码和汉明码的容错加法器
High Performance Re-configurable Adder Design for Digital Signal Processor 数字信号处理器中高性能可重构加法器设计
The paper proposes a five-input adder module with dual carry-out, which can process more information. 本文提出了一种处理信息量较大的双进位五输入加法器模块。
To accelerate the adder, a new parallel integer addition algorithm-carry barrel adder algorithm was proposed. 为了提高加法器的运算速度,提出了一种新型并行整数加法算法&桶形整数加法算法。
Disclosed is a safety explosion proof type sodium hydride adder which is an integral structure. 安全防爆型氢化钠添加器,是一个整体结构。
A self-test scheme, under which all test patterns for adder under test in VLSI are produced by the adder self, is presented based on arithmetic additive generator. 基于算术加法测试生成,提出了VLSI中加法器的一种自测试方案:加法器产生自身所需的所有测试矢量。
If you are bitten by an adder you may not experience any symptoms at all. 如果您是咬了一加法您可能不会遇到任何症状。
The bit serial adder system was chosen over a normal gear system because of the number of gears it takes to make the clock's calculations. 该位串行加法器系统是选择了一个由于齿轮数齿轮系统的正常需要,使时钟的计算。
This process requires that the adder used in multibit addition handle three inputs. 这就要求用于多位数相加的加法器具有三个输入端。
MSN Content Adder provides useful tools, It allows you to generate pack of MSN Content from images file. MSN内容加法提供了有用的工具,它允许你的MSN生成包的内容,图像文件。
Results show that the novel structure can realize the logic function of an adder successfully. 结果显示,这种新的全加器能正确完成加法器的逻辑功能。
It shows that mirrored adder is better than carry look ahead adder in arithmetic speed and layout. 结果表明镜像加法器在运算速度、版图布局上都优于超前进位加法器。
Addend and the summand input, and digital and carry the output device is a half adder. 加法器是产生数的和的装置。加数和被加数为输入,和数与进位为输出的装置为半加器。
A fast carry-skip adder is proposed based on variable-sized two-level block carry-lookahead logic. 提出了一种基于方块超前进位的快速进位跳跃加法器。
We also describe the principle and possibilities of the all-optical prefix tree adder. 描述了该全光前缀树加法器的原理,说明了其实现的可能性。
A Study on High-power Solid-state Pulse Modulator of Adder Topology 加法器结构的大功率固态脉冲调制器的研究