superscalar
英 [ˌs(j)uːpəˈskeɪlə]
美 [ˌsupərˈskeɪlər]
网络 超级标量; 超标量处理器; 超量; 超纯量架构; 超标量
复数：superscalars
BNC.32056 / COCA.39643
双语例句
- A superscalar Laundromat, for example, would use a professional machine that could say and wash three loads at once.
例如，一家超标量体系的自助洗衣店，将会采用很快就能洗三倍洗衣量的专门机器。 - Avoid computer jargon when you write for laymen. The buzz-word superscalar is commonly used to describe this approach.
写东西给一般人看时，应避免使用电脑术语。电脑术语超标量体系结构通常就是用来描述这种方法的。 - Element Contents in Soil from the Region of Zunyi and Measures of Preventing and Controlling Carcinogenic Superscalar Elements
遵义地区土壤元素含量与超标致癌元素的防治措施 - A multi-ported register file is often required by the superscalar microprocessor to handle multiple simultaneous loads and stores, which cause large increase in area and power consumption.
对于流水线型的超大规模微处理器，通常采用多端口的寄存器堆暂存中间数据，这些读写操作势必增加寄存器堆的芯片面积和功耗。 - Study of reorder buffer in superscalar processors
超标量处理器中重排序缓冲器的研究 - A Coating Information Management System Based on Superscalar Pipelining Model
基于超标量指令流水模型的船舶涂装信息管理系统 - Method and systems are disclosed for exploring instruction-level parallelism in superscalar processors by renaming stack entries.
本发明揭露了经由重新命名堆叠记录之方法与系统装置，以发掘超纯量处理机指令间平行度。 - Research on Key Techniques of Superscalar Embedded Processor Design
超标量嵌入式处理器关键技术设计研究 - The debate between the merits of superscalar and VLIW is not only restricted to the GPP universe.
之间的辩论的优点超标和VLIW指令不仅限于优良药房工作规范宇宙。 - In order to solve these problems, a mathematical programming model was designed making use of principles of Superscalar Pipelining.
本文以解决这些问题为背景，利用超标量指令流水原理设计了一个数学规划模型。 - VLIW chips don't need most of the complex control circuitry that superscalar chips must use to coordinate parallel execution at runtime.
VLIW芯片不需要超级标量芯片为运行时协调并行处理所采用的复杂控制电路。 - Modem superscalar microprocessors try to perform anywhere from three to six instructions in each stage.
现代超标量体系结构的微处理器努力在流水线操作的每一步中完成三到六条命令。 - Firstly, for the purpose of research and verification of multithread microprocessor, a superscalar microprocessor model ARMP-V2 is built on the basis of ARMP microprocessor;
首先，在设计的嵌入式微处理ARMP的基础上进行改进，提出了一个超标量处理器模型，用于多线程处理器系统结构的研究与验证。 - Research and Application on Superscalar Processor
超标量技术及结构研究与应用 - The Explicitly Parallel Instruction Computing ( EPIC) technology combines the advantages of the superscalar and VLIW technologies. Through the communication between the compilers and the hardware, it improves the performance of the processor.
显式并行指令计算（ExplicitlyParallelInstructionComputing，EPIC）机制结合超标量和超常指令字技术的优势，通过增强编译器和处理器之间的通信提高系统性能。 - When we implement the design, we can find that the key point of superscalar pipeline design is how we can implement an efficient dynamic scheduling model and the register file.
超标量流水线的设计难点在于如何高效的实现动态调度和寄存器重命名算法，以及如何设计多读多写的寄存器堆。 - The principle of pipelined processor is introduced and the performance of superpipelined superscalar processor in querying is discussed. The different processors are compared.
流水线作业是实现并行处理的重要方法。在介绍了流水线处理机的工作原理后，首次采用基于排队理论的数学模型解析了超级流水线超标量处理机的性能，并进行了不同类型处理机的性能比较。 - This thesis anslysises the architecture and the diversified techniques of superscalar computer.
本文对超标量的体系结构特点进行了深入分折，探讨了超标量处理器中采用的各项技术。 - In this paper, the fundamental principles and pipelined process of superscalar processor, superpipelined processor and superpipelined superscalar processor are expounded, and the typical architectures of the three processors are presented.
本文介绍了超标量处理机、超级流水线处理机、超级流水线超标量处理机的基本原理和流水处理过程；列举了三种处理机典型机器的基本结构； - This paper discuss the technique and structure of superscalar and example PowerPC 620.
讨论超标量处理机采用的技术以及结构，并举例PowerPC620。 - This paper has discussed the relationship between the machine cycle and instruction execution time for superscalar RISC architecture, issuing multiple instructions in one machine cycle. Several new design features of superscalar RISC architecture with single execution unit and multiple function units have been analysed.
本文讨论超标量RISC结构中单周期发多条指令中周期和执行指令时间的相对关系，并分析了新型超标量RISC结构的实现方案，其中包括具有单个执行部件和多个执行部件的结构。 - Research and Application on Superscalar Microprocessors
超标量微处理器研究与应用 - The memory subsystem has been one of the main bottlenecks to improve the performance in modem microprocessor, both in superscalar processors with dynamic scheduling and in VLIW processors with static scheduling.
无论是在采用动态调度的超标量微处理器中，还是在采用静态调度的超长指令字微处理器中，存储子系统都已经成为制约微处理器性能的主要因素之一。 - Based on trace processors, MPTP duplicates multiple superscalar processors as processing elements ( PE), and executes instruction traces in PEs.
MPTP处理器以Trace处理器为基础，重复设置多个超标量处理单元，把指令流的多条Trace发送到处理单元同时执行。 - In this paper, pipelined processor is expounded, and analytic performance of Superscalar Processor and Superpipelined in queueing theory, the analysis provides many method and theoretical basis for improve performance pipelined processor.
文章介绍了流水线处理机的工作原理，并首次利用排队理论，对超标量、超级流水线性能进行了解析评价和比较，讨论了提高流水线处理机性能的几个途径和如何选择合理的流水线级数。 - High performance requires the register files have short access latency, while embedded application focuses on running power and standby power. Superscalar CPUs need the register files have multiple read and write ports.
高性能要求寄存器文件具有小的访问延时，而嵌入式应用更关注工作功耗和待机功耗，超标量处理器则要求寄存器具有多个读写端口。 - A non-blocking message passing mechanism is proposed to implement thread synchronization, which makes flexible switch between multithread and superscalar modes possible.
提出非阻塞式的消息传递线程同步机制，实现了灵活的多发射和多线程模式切换。 - To fully exploit instruction level parallelism and improve Instruction per Cycle, nowadays high-powered superscalar processors have large issue widths.
为了充分开发程序的指令级并行性以提高每周期完成指令数，当今的高性能超标量处理器普遍采用了较大的发射宽度。 - Modern digit signal processor ( DSP) achieve instruction level parallelism with superscalar or very long instruction word ( VLIW).
现代数字信号处理器（DSP）一般采取超长指令字或是超标量来实现指令级并行。