pipelined
英 [ˈpaɪplaɪnd]
美 [ˈpaɪˌplaɪnd]
网络 流水线化; 流水线; 管线化; 管道化; 管道式
过去式：pipelined
双语例句
- This allows pipelined execution, in the typical manner adopted by relational database systems.
这允许按关系数据库系统采用的典型方式进行流水线执行。 - The EIB allows the PPE to start downloads on multiple SPEs and to overlap their starts and stops very efficiently so that the entire process is fully pipelined.
EIB允许PPE在多个SPE上启动下载，并非常高效地交错它们的启动和停止，所以整个过程是完全管道化的。 - Improved Digital Calibration Arithmetic for Pipelined A/ D Converter
用于流水线A/D转换器的改进型数字自校准算法 - Fast Simulation of High-Speed and High-Resolution Pipelined ADC
高速高精度流水线ADC的快速仿真方法研究 - Graph Process Unit ( GPU) usually adopts a pipelined architecture, and implements some general computer graphics API.
图形处理器（GPU）通常采用流水线体系结构，遵循通用图形接口规范。 - The dual ADC core features a multistage, differential pipelined architecture with integrated output error correction logic.
这款双通道ADC内核采用多级、差分流水线架构，并集成了输出纠错逻辑。 - Application of Digital Trimming in High-Speed and High-Resolution Pipelined A/ D Converters
数字修调技术在高速高精度流水线ADC中的应用 - The Multi-Position Pipelined Computer System for Gene Chip
用于基因芯片多工位流水线处理的计算机系统 - The hardware realization of a digital background calibration technique for pipelined A/ D converters
一种适用于流水线ADC的数字校准算法的硬件实现 - This thesis describes the system design of a high-resolution pipelined ADC.
本文论述了高速高精度流水线结构模数转换器的设计。 - A low supply voltage sample-and-hold circuit for a pipelined analog-to-digital converter is described.
设计了一个用于流水线型模数转换器的低压采样保持电路。 - A High Speed& Resolution Track-and-hold Circuit for Pipelined A/ D Converter
一种高速、高精度跟踪/保持电路的设计 - A pipelined implementation method of AES encryption for GPON
一种应用于GPON的AES加密流水线实现方法 - Design of a 12 bit 80 MS/ s CMOS Pipelined ADC
一种12位80MS/sCMOS流水线ADC设计 - Design of a 3-stage Pipelined Modular Multiplication and Addition Unit for ECC
一种适合ECC的三级流水模乘加单元设计 - A 10 bit 100 MS/ s Pipelined A/ D Converter Implemented in Digital CMOS Process
一种数字CMOS工艺制造的10位100MS/s流水线ADC - A High Resolution Low Power Sample and Hold Module Dedicated to a Pipelined ADC
一个用于流水线模数转换器的高精度、低功耗采样保持电路 - This dissertation investigates the implementation of low cost, high-speed, high-resolution pipelined ADCs for SoC applications in standard CMOS logic process.
本文研究了标准数字CMOS工艺下适于系统集成的低成本高速高精度流水线模数转换器（ADC）的实现。 - A novel capacitor mismatch calibration technique for pipelined analog-to-digital conversion is presented.
为了减小电容失配误差，提出了一种电容失配校准的方法。 - The pipelined global shutter capability enables exposure during read-out to reduce motion blur.
该流水线全球快门功能使在读出，以减少运动模糊曝光。 - Multiple-instruction stream pipelined processor
多指令流流水线处理机 - Pipelined A/ D converter using op-amp based switched-capacitor circuits requires high-gain and wide-bandwidth OTA to ensure its speed and resolution.
基于运算跨导放大器（OTA）和开关电容的流水线A/D转换器（ADC）需要使用高增益大带宽OTA来保证其速度和精度。 - The pipelined approach is much quicker.
流水线操作方法要快得多。 - One of the unique features of CMV12000 is the novel pixel structure, which combines pipelined global shutter operation with CDS.
对CMV12000的独特功能之一是新的像素结构，结合流水线CDS的全局快门操作。 - Research on From-to Chart optimizing method based on pipelined production process operating sequence diagram
基于流水线的机器排序优化从至图分析方法操作程序图操作顺序图 - System Modeling and Simulation of 16-bit Pipelined ADC
16位流水线ADC系统级建模及仿真 - Design of Low Power Pipelined ADC for CMOS Image Sensor
CMOS图像传感器中低功耗流水线ADC的设计 - Design of a Two-Stage Pipelined Circuit with Probability Splitting Calculation
具有概率分离计算功能的二级流水线电路设计 - High Performance Sample and Hold Circuit for Pipelined ADC
适用于流水线ADC的高性能采样/保持电路 - Design of Main Circuits in a Low-power Pipelined Analog to Digital Converter
低功耗流水线模数转换器（ADC）关键单元电路设计